[TOC]

On the FETs

TODO the conceptual understanding of the electron inversion layer and stuff.

Use the damn chart

	NMOS	PMOS
Triode or Non-Saturation	$v_{D S} < v_{GS} - V_{TN}$	$v_{S D} < v_{SG} + V_{TP}$
	$i_{D} = K_{n} [2 (v_{GS} - V_{TN}) v_{D S} - v_{D S}^{2}]$	$i_{D} = K_{p} [2 (v_{SG} + V_{TP}) v_{S D} - v_{S D}^{2}]$
Saturation	$v_{D S} \geq v_{GS} - V_{TN}$	$v_{S D} \geq v_{SG} + V_{TP}$
	$i_{D} = K_{n} (v_{GS} - V_{TN})^{2}$	$i_{D} = K_{p} (v_{SG} + V_{TP})^{2}$
Cutoff	$v_{GS} < V_{TN}$	$v_{SG} < - V_{TP}$
	$i_{D} = 0$	$i_{D} = 0$

Transition Point	$v_{D S} (s a t) = v_{GS} - V_{TN}$	$v_{S D} (s a t) = v_{SG} + V_{TP}$
Enhancement Mode	$V_{TN} > 0$	$V_{TP} < 0$
Depletion Mode	$V_{TN} < 0$	$V_{TP} > 0$

And remember:

Lets talk about NMOS and PMOS an try to recontextualize them.

NMOS - classic transistor, allows current to flow when a positive voltage is applied
PMOS (chaotic evil). Allows current to flow when negative voltage is applied. Allow LESS current to flow when a positive voltage is applied. This positive/negative voltage distinction is important for enhancement/depletion.

For both NMOS and PMOS transistors, the gate voltage that matters for turning the transistor on or off is relative to the source terminal. This voltage difference is referred to as $V_{GS}$ (Voltage between Gate and Source).

NMOS
- To turn it "on", the gate voltage ( $V_{G}$ ) should be more positive than the source voltage ( $V_{S}$ ) by at least a threshold voltage ( $V_{T H}$ ). So, $V_{GS}$ should be greater than $V_{T H}$ .
PMOS
- To turn it "on", the gate voltage ( $V_{G}$ ) should be more negative than the source voltage ( $V_{S}$ ) by at least a threshold voltage ( $V_{T H}$ ). So, VGSVGS should be less than $- V_{T H}$ .

It's essential to remember this relative nature of the gate voltage to the source because the source voltage can change, especially in circuits where the transistor is not in a simple switch configuration. This means that the absolute gate voltage needed to turn on a MOSFET can vary depending on the source voltage.

Okay but theres a ton of modes there, lets break them down

Triode / Non Saturation

The MOSFET behaves like a variable resistor. The resistance between drain and source is controlled by the gate voltage.

Saturation

The MOSFET is fully on and conducts maximum current from drain to source. This is the mode in which MOSFETs are typically operated for amplification.

Cutoff

The transistor is fully "off," and no current flows from collector to emitter.

Transition Point

This isn't really a "mode" but rather a point. It's the point between cut-off and active mode, where the transistor just starts to turn on.

Enhancement Mode

Material / manufacturing property
Enhancement Mode: Refers to a MOSFET that is normally "off" when no gate voltage is applied. It requires a gate voltage to "enhance" or create a channel for current to flow between the source and drain. This is similar to turning a switch "on."
NMOS
- Enhancement mode is when its on and current is flowing and the input is a typical positive voltage.
PMOS
- Enhancement mode is when its on and current is allowed to flow but the input is a negative voltage
Enhancement is the mode when current is allowed through the FET

Depletion Mode

Material / manufacturing property
Depletion Mode: Refers to a MOSFET that is normally "on" with a natural channel allowing current flow. Applying a gate voltage "depletes" or reduces the channel, controlling or even cutting off the current flow, similar to turning a switch "off."
Depletion mode is when it really doesn't want current through the FET

![regions of operation](./regions of operation.png)

More on Enhancement / Depletion

In the context of transistors "ON" refers to the transistor being in a conducting state, allowing current to flow between drain and source. "OFF" means minimal current flow:

	NMOS	PMOS
Enhancement Mode	Normally OFF Turns ON with positive $V_{GS}$	Normally OFF Turns ON with positive $V_{SG}$ (negative $V_{SG}$ )
Depletion Mode	Normally ON Turns OFF or reduces conduction with negative $V_{GS}$	Normally ON Turns OFF or reduces conduction with negative $V_{SG}$ (positive $V_{GS}$ )

One more equation for the road

For NMOS

$K_{n} = \frac{W μ _{n} C _{o x}}{2 L} = k_{n}^{'} \frac{W}{2 l}$

For PMOS

$K_{p} = \frac{W μ _{p} C _{o x}}{2 L} = k_{p}^{'} \frac{W}{2 L}$

Oxide Layer Capacitance

$C_{o x} = ϵ_{0} / t_{o x}$

I honestly have no idea what these mean.